The OpenHW Group has announced a comprehensive open- source RISC-V microcontroller (MCU) development kit for embedded internet of things (IoT), and artificial intelligence (AI) driven applications, featuring full-featured integrated development environment (IDE), open printed circuit board (PCB) design, and support for Amazon Web Services (AWS) via AWS IoT ExpressLink.
The non-profit, OpenHW Group and its members and individual contributors, where hardware and software designers collaborate to develop open-source cores and related IP tools and software, are showcasing the CORE-V MCU DevKit emulating an array of weather station sensors. The demo, involving more than a dozen DevKits, will showcase the CORE-V MCU, CORE-V SDK, and interconnection of IoT sensors and application to AWS, with local temperature readings on the CORE-V MCU DevKit NexysA7 board.
The CORE-V MCU is based on the open-source CV32E40P embedded-class processor, a small, efficient, 32-bit, in-order open-source RISC-V core with a four-stage pipeline that implements the RV32IM[F]C RISC-V instruction extensions. The DevKit SDK, development of which was led by Ashling, contains an IDE, Debugger, GCC compiler (supplied by Embecosm), the FreeRTOS real-time OS, and AWS IoT ExpressLink connectivity, using Espressif’s RISC-V-based Wi-Fi radio over AWS IoT ExpressLink. This project highlights the open-source collaborative development of industry-grade CORE-V processor IP with supporting hardware and software by a wide spectrum of members within the OpenHW community.
AWS IoT ExpressLink is a new service that powers a range of hardware modules and includes AWS-validated software that securely connects devices to the cloud.
The OpenHW ecosystem worked together to deliver the CORE-V DevKit for IoT developers:
- The CORE-V MCU is manufactured by GlobalFoundries’ proprietary 22FDXprocess technology platform, suited for efficient single-chip integration of digital and analog signals, delivering cost-effective performance for connected and low-power embedded applications.
- Design and verification of the CV32E40P processor, the heart of the CORE-V MCU, involved key contributions from Imperas, Siemens EDA, SiLabs and others, building on the original design from ETH Zurich. The CV32E40P core is based on the PULP (parallel ultra-low power) platform RI5CY core, originally developed at ETHZ’s integrated systems laboratory (IIS) and the energy-efficient embedded systems (EEES) group of the University of Bologna. Digital integration and back-end design of the CORE-V MCU was handled by QuickLogic and CMC Microsystems, respectively.
- The CORE-V MCU includes QuickLogic’s eFPGA, designed to accelerate AI/ machine learning (ML) and other computationally intensive workloads from the CV32E40P processor.
- Embecosm is leading OpenHW SW Task Group projects including GCC compiler tools for the CORE-V cores and MCU while Ashling has led the development of the CORE-V SDK based on the Eclipse IDE, OpenOCD for debug and example programs.
- Imperas has released riscvOVPsimCOREV as a free simulator for the CORE-V MCU, based on the Imperas RISC-V reference models used in the verification of CV32E40P, as a starting point for software development tasks.
- The CORE-V MCU DevKit PCB board design integrating the CORE-V MCU and expansion board for the demo were handled by AWS, using an AWS IoT ExpressLink powered for secure cloud connectivity.
- Espressif Systems, an IoT connectivity solution provider, supplied AWS IoT ExpressLink modules for the CORE-V DevKit PCB to provide AWS IoT connectivity.
- Data visualization for the demo is provided by Amazon Managed Grafana.
- The CORE-V MCU DevKit early access campaign manufacturing and shipping is being coordinated by GroupGets. Early access CORE-V MCU DevKit quantities are limited and can be reserved here.
OpenHW Group is helping develop and deliver RISC-V hardened ecosystem
Starting from a single project in 2019, OpenHW Group now fosters over twenty open-source projects. Each participant of the OpenHW Group, involving industry, academic, and individual contributors helps advance projects according to their priorities and skillsets, with the aim of reducing development costs and fostering an ecosystem of stakeholders with a shared interest in bringing open-source projects to fruition.
The organization and its membership are developing the CORE-V family of open-source, RISC-V microprocessor cores, along with associated accelerators, interfaces, enabling hardware, system on chip (SoC) platforms, and software toolchains in a comprehensive ecosystem approach.
The output of an OpenHW processor core project is typically a set of open-source intellectual property (IP) that includes fully verified register transfer level (RTL) code, a user manual and test benches that together can be used as the heart of a semiconductor device design. OpenHW projects are developed under permissive open-source licenses, such as Solderpad 2.0 (which builds on Apache 2.0), that provide implementers the freedom to innovate, to customize, and to commercialize. OpenHW projects use the Eclipse development process (EDP) to ensure IP adopters have full confidence in the provenance of open-source contributions and the integrity of project outputs.
Often confused by those not directly involved, the OpenHW Group is distinct from RISC-V International, the group that is focused on promoting the RISC-V standard. The RISC-V ISA specification covers just the ISA itself and does not provide tangible processor designs. That’s where the OpenHW Group comes in – this group and its members design and verify RISC-V processor cores (the CORE-V family) to industrial quality levels and release the tested processor code as open-source artifacts.
The OpenHW Group processor CORE-V family cores projects include:
● The CVA6 family of 64/32-bit application processors intended for applications requiring higher performance and Linux support.
● The CVA5 family of high performance, FPGA-optimized application processors.
● The CVE4 family of 32 bit embedded-class cores intended for a variety of IoT and edge applications, typically running FreeRTOS, other real-time operating systems, or in bare-metal scenarios. Starting with the CV32E40P released in 2020, the family includes the CV32E40Pv2 integrating PULP extensions, the CV32E40X with extension interface, the CV32E40S security focused core, and the CV32E41P with support for compressed instructions.
Partners helping develop the systems
The companies involved with delivering the elements of the development kit include Ashling, Embecosm, Espressif Systems, Imperas, QuickLogic, and Silicon Labs.
Ashling CEO, Hugh O’Keeffe, said that it is actively involved in working on the definition and implementation of a CORE-V development kit, which includes a reference board designed around a CORE-V MCU and an SDK containing everything needed to develop software to run on the board. He commented, “Our overriding goal is to make the CORE-V Dev Kit and SDK plug-and-play (or to work out-of-the-box for those of you who remember when software was shrink-wrapped). Simply put, we want you up and running in minutes. Whether it be downloading and running a simple blinky example or building a CORE-V ‘C’ edge AI application utilizing an on-board FPGA-based neural network accelerator.”
For Embecosm, its’ focus is on commercial reliability for all the software and moving AI beyond deep neural networks to provide machine learning systems that are inherently trustworthy and explainable. “Open Hardware Group provides an environment that allows rapid development of world-class software tool technologies, while maintaining commercial robustness. This allows us to bring up new RISC-V compiler technologies and operating systems ahead of the official RISC-V and tool chain communities,” said Embecosm CEO, Jeremy Bennett.
Espressif Systems enables connectivity for the CORE-V MCU dev kit with the Espressif’s AWS IoT ExpressLink module. This module is based on Espressif’s ESP32-C3 RISC-V Wi-Fi and Bluetooth LE SoC. Using this connectivity module, the applications running on the CORE-V MCU can readily connect to AWS IoT Core and related services. Espressif’s AWS IoT ExpressLink module handles the complex yet undifferentiated tasks such as network provisioning, authentication, connectivity, messaging, OTA and device management and provides a simple serial interface to the application developers developing applications on the CORE-V MCU.
Imperas has been actively involved with the OpenHW verification task Group – from the outset, the goal was to provide a high-quality verification environment to deliver open-source RISC-V IP cores with industrial-grade quality. “Open-source hardware traditionally faces challenges in achieving commercial acceptance, primarily due to the historical risk factors around quality levels and usability concerns,” said Simon Davidmann, CEO at Imperas Software Ltd. “The OpenHW verification working group members together with support from Imperas have pioneered the use of best-in-class ‘lock-step-compare’ industrial verification methods and commercial tools for the open-source CV32E40P processor core. The MCU project is the first of many devices that will show the potential that can now be achieved with high quality open-source cores.”
QuickLogic is collaborating with OpenHW Group to produce a commercial quality, high performance, low power platform for AI/ML IoT applications. Combining a RISC-V core with QuickLogic’s embedded FPGA (eFPGA) technology results in a CORE-V MCU device that allows developers to optimize the compute bandwidth / power curve for their specific use case by making intelligent software (processor) / hardware (eFPGA) design allocations.
“QuickLogic is committed to the OpenHW group’s vision of making hardware-based IP more accessible to the open-source community. Our embedded FPGA (eFPGA) technology enables a multitude of use cases and meshes well with the group’s CORE-V MCU initiative,” said Tim Saxe, CTO, QuickLogic.
Silicon Labs CTO, Daniel Cooley, added, “Through the open-source development and verification efforts of the OpenHW ecosystem, the CORE-V CV32E40P core has proven to be quite useful in Silicon Labs’ high-volume production SoCs. We continue to advance development within the CORE-V family of open-source RISC-V cores and anticipate they will also be used in our high volume SoCs.”
Finally, Rick O’Connor, president and CEO, OpenHW Group, commented, “The enormous potential of IoT applications requires new ways of thinking about design, and the open-source community is delivering hardware, software and development tools to accelerate innovation. It’s truly inspiring to see such a cohesive global collaborative engineering effort to develop open-source building blocks enabling embedded MCU designs.”